Architectural support for block transfers in a shared-memory multiprocessor

TitleArchitectural support for block transfers in a shared-memory multiprocessor
Publication TypeConference Paper
Year of Publication1993
AuthorsWilton, S. J. E., and Z. Vranesic
Conference NameParallel and Distributed Processing, 1993. Proceedings of the 5th IEEE Symposium on
Pagination51 -54
Date Publisheddec.
Keywordsarchitectural support, base architecture, block transfers, hardware support, Hector multiprocessor, initialization code, memory access behavior, memory architecture, operating system, operating systems (computers), performance evaluation, performance improvement, shared memory systems, shared-memory multiprocessor

This paper examines how the performance of a shared-memory multiprocessor can be improved by including hardware support for block transfers. A system similar to the Hector multiprocessor developed at the University of Toronto is used as a base architecture. It is shown that such hardware support can improve the performance of initialization code by as much as 50%, but that the amount of improvement depends on the memory access behavior of the program and the way in which the operating system issues block transfer requests


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