Novel interconnect infrastructures for massive multicore chips #x2014; an overview

TitleNovel interconnect infrastructures for massive multicore chips #x2014; an overview
Publication TypeConference Paper
Year of Publication2008
AuthorsPande, P. P., A. Ganguly, B. Belzer, A. Nojeh, and A. Ivanov
Conference NameCircuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on
Pagination2777 -2780
Date Publishedmay.
Keywords2D copper-based IC, C, carbon nanotubes, CMOS integrated circuits, CMOS scaling, geometrical constraints, integrated circuit interconnections, interconnect infrastructures, massive multicore chips, Moore law, onchip interconnect systems, optical technologies, SoC, system-on-chip, systems-on-chip

With the well-known trend of CMOS scaling as per Moore's law, traditional on-chip interconnect systems are reaching the point of having a very limited ability to meet the performance needs and specifications of systems-on-chip (SoCs). The conventional two-dimensional (2D) copper-based IC has inherent limitations due to the geometrical constraints of the planar structure. Innovative interconnect paradigms based on optical technologies, RF/wireless, carbon nanotubes, or 3D integration are promising alternatives that may indeed overcome the challenges encountered. In this paper we present an overview of different emerging non-traditional approaches to achieve massive degree of integration in a single chip. The advantages and underlying challenges of each method are highlighted.


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