Design of an active-inductor-based termination circuit for high-speed I/O

TitleDesign of an active-inductor-based termination circuit for high-speed I/O
Publication TypeConference Paper
Year of Publication2008
AuthorsLee, Y. - S. M., and S. Mirabbasi
Conference NameCircuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on
Pagination3061 -3064
Date Publishedmay.
Keywordsactive networks, active-inductor-based termination circuit, CML output driver, CMOS integrated circuits, CMOS process, eye-diagram simulations, high-speed I/O, inductors, jitter performance, network topology, size 90 nm

An active inductor termination for high-speed I/O circuits is presented. In comparison with the conventional active-inductor-based circuits, the proposed topology operates from a lower supply voltage and/or consumes less power. A prototype of the active termination with a CML output driver is designed, simulated, and laid out in a 90 nm CMOS process. The eye-opening and jitter performance in the eye-diagram simulations of the active termination compare favorably with its passive counterparts. In comparison with a passive-inductor-based design, the circuit consumes additional 1.327 mW DC power while occupying a die area of 17 mum times 25 mum, which is more than 60 times smaller than the area of a termination circuit with a 0.8 nH passive inductor.


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