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| Title | Rapid estimation of power consumption for hybrid FPGAs |
| Publication Type | Conference Paper |
| Year of Publication | 2008 |
| Authors | Ho, C. H., P. H. W. Leong, W. Luk, and S. J. E. Wilton |
| Conference Name | Field Programmable Logic and Applications, 2008. FPL 2008. International Conference on |
| Pagination | 227 -232 |
| Date Published | sep. |
| Keywords | domain-specific coarse-grained units, field programmable gate arrays, floating point benchmark circuits, hybrid FPGA, island-style fine-grained units, low-power electronics, power consumption, standard ASIC tools, standard FPGA tools |
| Abstract | A hybrid FPGA consists of island-style fine-grained units and domain-specific coarse-grained units. This paper describes an approach to estimate the power consumption of a set of hybrid FPGA architectures. The dynamic power consumption of the fine-grained units is obtained using standard FPGA tools, and the coarse-grained units using standard ASIC tools. Based on this approach, the dynamic power consumption of different hybrid FPGA architectures can be studied and we report on results over a set of floating point benchmark circuits. |
| URL | http://dx.doi.org/10.1109/FPL.2008.4629936 |
| DOI | 10.1109/FPL.2008.4629936 |