Design procedures for differential cascode voltage switch circuits

TitleDesign procedures for differential cascode voltage switch circuits
Publication TypeJournal Article
Year of Publication1986
AuthorsCHU, K. M., and D. L. Pulfrey
JournalSolid-State Circuits, IEEE Journal of
Pagination1082 - 1087
Date Publisheddec.
KeywordsCMOS integrated circuits, Integrated logic circuits, logic design

Differential cascode voltage switch (DCVS) logic is a CMOS circuit technique which has potential advantages over conventional NAND/NOR logic in terms of circuit delay, layout density, power dissipation, and logic flexibility. Two procedures are presented for constructing DCVS trees to perform random logic functions. The first procedure uses a Karnaugh mapping technique and is a very powerful pictorial method for hand-processing designs involving up to six variables. The second procedure is a tabular method based on the Quine-McCluskey approach and is suitable for functions with more than six variables. Both of these procedures are considerably easier to implement than a recently proposed algebraic technique which relies upon decomposition and factorization of Boolean expressions. Several DCVS circuits that have been synthesized by the Karnaugh map (K-map) and tabular procedures are presented.


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