Efficient one-dimensional systolic array realization of the discrete Fourier transform

TitleEfficient one-dimensional systolic array realization of the discrete Fourier transform
Publication TypeJournal Article
Year of Publication1989
AuthorsBeraldin, J. A., T. Aboulnasr, and W. Steenaart
JournalCircuits and Systems, IEEE Transactions on
Pagination95 -100
Date Publishedjan.
Keywordsbus-oriented scheme, cellular arrays, computerised signal processing, DFT, discrete Fourier transform, Fourier transforms, latency time, nonstop input sequences, one-dimensional systolic array, parallel algorithms, parallel architectures, pipeline processing, pipeline scheme, read-only memories, stored-product ROMs

A one-dimensional systolic array realizing the discrete Fourier transform (DFT) of nonstop input sequences is presented. Two arrays having different output schemes, i.e. pipelined and bus-oriented output paths, are introduced. Both arrays require N cells and take N clock cycles to produce a complete N-point DFT. The latency time for the pipeline scheme is twice that of the bus-oriented scheme. For both arrays, a continuous flow of input vectors is allowed and no idle period is required between successive vectors. The array coefficients are static and thus stored-product ROMs (read-only memories) can be used in place of multipliers to limit cost as well as eliminate errors due to coefficient quantization


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