Course Structure/Operation
This is a one semester, project-based course. Students propose, model, design, and layout a Photonic Integrated Circuit (PIC) using active silicon photonics technology. The layout is designed based on the fabrication technology available from IME Singapore, providing students with an opportunity to design into an advanced photonics manufacturing process. Fabrication is available, at additional cost, via CMC Microsystems.
Prerequisites: At least one course at the graduate level on optics, waveguides, or lasers (e.g. EECE 584, 594), which involves the design, fabrication and testing of a photonic integrated circuit, or approval from the instructor.
Learning Objectives
By the end of the course, it is expected that students will be able to:
Detailed Course Outline
Lectures (default lecture is 1 hour; topics spanning multiple hours noted)
Texts and Bibliography
There is no required text for the course. Notes and additional readings (journal papers, theses) will be provided electronically.
Independent study: literature review on student’s chosen topic
Some additional information sources are as follows:
L. Chrostowski, M. Hochberg, “Silicon Photonics Design”, Cambridge University Press, 2015 (In press)
A. Yariv, P. Yeh, "Photonics: Optical Electronics in Modern Communications", 6th ed.
Lorenzo Pavesi, Gérard Guillot, "Optical Interconnects: The Silicon Approach", Springer Berlin/Heidelberg, 2006, no. 978-3-540-28910-4.
J. Heebner, R. Grover, T. A. Ibrahim, "Optical Microresonators: Theory, Fabrication and Applications", Springer Berlin/Heidelberg, 2008, no. 978-0-387-73068-4.
Course evaluation / assessment
Course evaluation:
The mask layouts are evaluated using a Design Review Checklist (rubric for mask layout) given to the students. The design documents are evaluated on literature review and background, technical content, design methodology, modeling results, and analysis.
Submission details for the project design document and final design report:
Design review checklist (rubric):
Manufacturability
Mask Layout
Post-processing
Off-chip interface (Optical)
Off-chip interface (Electrical)
Testing
Packaging:
Grading System