Simultaneous PVT-Tolerant Voltage-Island Formation and Core Placement for Thousand-Core Platforms

Sohaib Majzoub, Resve Saleh, Steven J.E. Wilton, and Rabab Ward

International Symposium on System-on-Chip, Oct 2009


Abstract

In this paper, we propose a novel approach to voltage island formation and core placement for energy optimization in manycore architectures under parameter variations at pre-fabrication stage. We group the cores into irregular "cloud-shaped" voltage islands. The islands are created by balancing the desire to limit the spatial extent of each island, to reduce PVT impact, with the communication patterns between islands. Compared to using rectangular islands, our approach leads to power improvements between 10 and 12%.

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