An Energy and Power Consumption Analysis of
FPGA Routing Architectures
Peter Jamieson, Wayne Luk, Steven J.E. Wilton, George A. Constantinides
International Conference on Field-Programmable Technology, 2009
Abstract
In this work, we evaluate bi-directional and unidirectional
FPGA routing architectures in terms of energy
and power consumption using an updated power estimation
framework compatible with VPR 5.0. The goal of this research
is to help FPGA vendors find the best FPGA architectures.
Initially, we make some general observations on how two types of
routing architectures affect speed, area consumption, and power
consumption. We observe how routing buffer sizing affects both
the critical path delay and power and energy consumption of
FPGAs with certain routing architectures. Our results show that
uni-directional routing architecture, in all but one case, is the
most energy efficient choice both in the traditional FPGA domain
and the mobile domain where clock frequencies are fixed.
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