The Architecture of Dual-Mode FPGA Embedded System Blocks
Ernie Lin and Steven J.E. Wilton
IEEE Custom Integrated Circuits Conference, 2002
Abstract
Recently, it has been shown that unused on-chip memories can be valuable
when they are used to implement logic. This paper explores how different
memory architecture parameters affect its ability to implement logic in
dual-mode FPGA embedded system blocks. It is shown that the optimum memory
architecture has a depth of 32 or 64 words, and that each word should
contain 16 bits.
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