Sohaib Majzoub      Assistant Professor
	Introduction Sohaib Majzoub received his BE in electrical engineering, computer section at Beirut Arab University (BAU) 2000, Beirut Lebanon, and his ME degree from American University of Beirut (AUB) (scholarship), 2003 Beirut Lebanon. During 2004, he joined the Pre-Doctoral School and worked for one year at the Processor Architecture Lab (LAP) at the Swiss Federal Institute of Technology (EPFL) (scholarship), Lausanne Switzerland. He is currently working towards his PhD degree in electrical and computer engineering at the Department of Electrical and Computer Engineering, University of British Columbia, Vancouver, BC, Canada. He is ACM and IEEE student member. He is working under the supervision of Dr. Resve Saleh and Dr Steve Wilton from the System on a Chip Research Lab and Dr. Rabab Ward from the Image Processing Research Lab. His main research work is in the field of Power Issues in Multi-processor platforms.
	Sohaib Majzoub finished his PhD degree and joined American University in Dubai, UAE, as Assistant Professor of Computer Engineering starting September 2010.
	Curriculum Vitae Resume
	Publications Refereed Journals 1. S. Majzoub, R. Saleh, S. J.E. Wilton and R. Ward “Energy Optimization for Many-Core Platforms: Communication and PVT Aware Voltage-Island Formation and Voltage Selection Algorithm,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (IEEE-TCAD), vol 29, 5, 816-829, May, 2010. (pdf) 2. S. Majzoub, H. Diab “MorphoSys Reconfigurable Hardware for Cryptography: The Twofish Case,” to appear in Journal of Supercomputing (JSC), 2010. 3. S. Majzoub, and H. Diab, “Instruction-Set Extension For Cryptographic Applications On Reconfigurable Platform” Special Issue on Advances in Circuits and Systems for Large Scale Integration, in The Journal of Circuits, Systems, and Computers, (JCSC) Vol. 16, No. 6, 2008. Refereed Conferences 4. S. Majzoub, R. Saleh, S. J.E. Wilton, and R. Ward "Simultaneous PVT-Tolerant Voltage-Island Formation and Core Placement for Thousand-Core Platforms,” International Symposium on System-on-Chip (SoC’09), October 5-7 2009, Tampere, Finland. 5. S. Majzoub, R. Saleh, S. J.E. Wilton, and R. Ward "Removal-Cost Method: An Efficient Voltage Selection Algorithm for Multi-Core Platforms under PVT,” 22nd IEEE International System-on-Chip Conference (SoCC’09), September 9-11 2009, Belfast, UK. 6. S. Majzoub, R. Saleh, and R. Ward, "PVT Variation Impact on Voltage Island Formation in MPSoC Design" The 2009 International Symposium on Quality Electronic Design (ISQED’09), March 16-18, 2009, San Jose, CA, USA. 7. S. Majzoub, H. Diab, "Mapping and Performance Analysis of Lookup Table Implementations on Reconfigurable Platform," IEEE/ACS International Conference on Computer Systems and Applications (AICCSA’07), Le Méridien Amman Hotel, Amman, Jordan, May 13-16, 2007 pp.513-520. 8. S. Majzoub, H. Diab, “Instruction-Set Extension for Cryptographic Applications on Reconfigurable Platform” The 6th International Workshop on System-on-Chip for Real-Time Applications, (IWSoC’06), Cairo, Egypt, December 27-29, 2006. 9. S. Majzoub, R. Saleh, and H. Diab, “Reconfigurable Platform Evaluation Through Application Mapping And Performance Analysis,” IEEE Symp. on Signal Proc. & Info. Tech. (ISSPIT2006). 10. M. Al-Khalidy, H. Diab, and S. Majzoub, “MorphoSys implementation of MD5 hash algorithm,” International Conference on Current Issues in Business and Information Technology, Beirut, Lebanon, May 21-22, 2004. 11. Sohaib Majzoub, and Hassan Diab: “Mapping and Performance Analysis Of The Twofish Algorithm On MorphoSys.” The ACS/IEEE International Conference on Computer Systems and Applications, Tunisia, July 14-18, 2003. 12. Hassan Diab, and Sohaib Majzoub: “Linear Filtering Algorithm Using Reconfigurable Computing.” The ACS/IEEE International Conference on Computer Systems and Applications, Tunisia, July 14-18, 2003. 13. I. Damaj, S. Majzoub and H. Diab. 2D and 3D Computer Graphics Algorithms under MorphoSys. The 12th International Conference on Field Programmable Logic and Applications, Montpellier, France 2002. Contact Address Sohaib Majzoub Ph.D. Candidate Office:System-on-a-Chip Research Group University of British Columbia 2356 Main Mall - Room #4025 KAISER Building Vancouver, B.C., Canada V6T 1Z4 Telephone:  (604) 822-3687                      Fax: (604) 822-9506 e-mail: sohaib. majzoub -at- computer. org