This page contains the data set and some scripts described in the following paper:
We will release our iRAC replica clustering tool shortly.
The tarred archives DO NOT include a complete architecture file. You will need a complete VPR4.30 architecture file to fully reproduce our results -- we have excluded them because they contain some data sensitive to our foundry partner, TSMC.
Note that the IORAT used for each of the benchmarks in our study were adjusted to the minimum amount such that the circuit was still logic limited. (The IORAT in the given arch file is too high and will lead to poor architecture/placement interaction for the Pipeline and Independent circuits.) We will release updated architecture files with correct IORATs shortly.
These spreadsheets contains data obtained prior to place and route of the meta circuits. It includes the channel width profile of each IP block along with the predictive analysis of channel width and area.
These spreadsheets contain data obtained from post place-and-route results of the meta circuits.
This script stitch all the files in a directory together. It assumes that each circuit is has the file extention .net and that all of the circuits have the same cluster size and the same number of inputs per cluster. Use equalize.pl to adjust cluster size and number of inputs for individual circuits.
This script will convert a .net file with a given "inclustersize innuminputs" to "newclustersize newnuminputs" by padding it with additional (unused) LUTs and inputs.