Professor Guy Lemieux

Guy Lemieux is an Assistant Professor in the Department of Electrical and Computer Engineering at the University of British Columbia in Vancouver, British Columbia, Canada.

His main research is in the design of FPGAs and CAD tools. His interests include FPGA architecture and CAD, FPGA and VLSI circuit design, computer architecture, and parallel computing systems.

His work on interconnect design for FPGAs resulted in a book, published in November 2003. He received a Best Paper Award at the 2004 IEEE International Conference on Field-Programmable Technology. He received a Bronze Leaf Certificate paper award at the 2008 CMC Microsystems and Nanoelectronics Research Conference.

Some of his past work on multiprocessing can be found at the University of Toronto.


Publications

Downloads

Contact Information

Links to Commercial FPGA/FPGA-like Vendors

Affiliations

Students

Current Students
Degree Name Email Graduation Thesis Topic Supervisory Arrangement
Ph.D. David Grant davidg expected 2009 Coarse-grain architecture and CAD
Ph.D. Usman Ahmed uahmed expected 2009 CAD framework for structured ASICs co-supervised with Steve Wilton
Ph.D. Graeme Smecher gsmecher expected 2011 Coarse-grain array programming
M.A.Sc. Darius Chiu dariusc expected 2008 Congestion-driven FPGA CAD
M.A.Sc. Johnny Ho johnnyho at ieee dot org expected 2008 Pattern matching in FPGAs
M.A.Sc. Patrick Dong patrick at 7x24 dot com expected 2009 Clock skew scheduling for FPGAs
M.A.Sc. Chris Chou cb_no4 at hotmail dot com expected 2009 Soft vector processor for FPGAs

Completed Students
Degree Name Current Position Completion Thesis / Project
M.A.Sc. Paul Teehan Ph.D. student, UBC October 2008 Reliable High-throughput FPGA Interconnect using Source-synchronous Surfing and Wave Pipelining pdf
Ph.D. Mehdi Alimadadi available! July 2008 Recycling Clock Network Energy in High-performance Digital Designs using On-chip DC-DC Converters pdf
90nm chip layout (4MB bitmap)
co-supervised with Patrick Palmer
M.A.Sc. Jason Yu Intel Canada May 2008 Vector Processing as a Soft-CPU Accelerator pdf
M.Eng. Eric Lai Amazon.com April 2008 n/a
M.A.Sc. Mark Yamashita IBM Canada November 2007 A Combined Clustering and Placement Algorithm for FPGAs pdf
M.Eng. Shirley Ma McKesson Canada December 2007 n/a
M.Eng. David Yeager IBM Canada December 2006 Interconnect Estimation for FPGAs pdf
M.A.Sc. David Leong Nokia Canada December 2006 Incremental Placement for FPGAs pdf
M.Eng. Wilson Lo unknown November 2006 Power Model for Small Custom Embedded Memories
supervised by André Ivanov
M.A.Sc. Edmund Lee Altera Toronto Summer 2006 Interconnect Driver Design for Long Wires in Field-Programmable Gate Arrays pdf
co-supervised with Shahriar Mirabbasi
M.A.Sc. Marvin Tom Xilinx San Jose Spring 2006 Channel Width Reduction Techniques for System-on-Chip Circuits in Field-Programmable Grate Arrays pdf
M.A.Sc. Anthony Yu Zeugma Systems Fall 2005 Defect Tolerance for Yield Enhancement of FPGA Interconnect Using Fine-grain and Coarse-grain Redundancy pdf
M.A.Sc. Victor Aken'Ova PMC-Sierra Spring 2005 Bridging the Gap between Soft and Hard eFPGA Design pdf
supervised by Resve Saleh

e-mail addresses above are @ece.ubc.ca (unless otherwise noted)

Funding

Financial support from the following organizations is gratefully acknowledged.

Links

You might also enjoy my old home pages as a graduate student at the University of Toronto.

Try searching Library and Archives Canada for Canadian theses and other publications.

If you are looking for information about my book, try here