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Guy Lemieux is an Associate Professor in the Department of Electrical and Computer Engineering at the University of British Columbia in Vancouver, British Columbia, Canada. His main research is in the design of FPGAs and CAD tools. His interests include FPGA architecture and CAD, FPGA and VLSI circuit design, computer architecture, and parallel computing systems.
His work on interconnect design for FPGAs resulted
in a book, published in November 2003.
He received a
Best Paper
Award at the
2004 IEEE International Conference on Field-Programmable Technology.
He received a
Bronze Leaf Certificate
paper award at the
2008 CMC Microsystems and Nanoelectronics Research Conference,
as well as a Best Poster award at BC Net 2009.
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| Degree | Name | Graduation | Thesis Topic | |
| Ph.D. | Aaron Severance | aaronsev | expected August 2015 | Vector processor architecture |
| Ph.D. | Ameer Abdelhadi | ameer | expected December 2016 | Parallel architecture design |
| Ph.D. | Hossein Omidian | ameer | expected December 2016 | High-level synthesis |
| M.A.Sc. | Michael (Xi) Yue | xiy | expected August 2014 | TBD |
| M.A.Sc. | Tom (Shaolin) Tang | sltang | expected August 2014 | TBD |
| M.Eng. | Douglas (Hak Hian) Sim | dsim | expected August 2014 | TBD |
| Degree | Name | Current Position | Completion | Thesis / Project |
| M.A.Sc. | Alex Brant | Altera Toronto | November 2012 | Coarse and Fine Grain Programmable Overlay Architectures for FPGAs pdf |
| M.A.Sc. | Zhiduo Liu | Altera San Jose | September 2012 | Accelerator Compiler for the VENICE Vector Processor pdf |
| M.A.Sc. | Chris Wang | Xilinx San Jose | October 2011 | Scalable and Deterministic Timing-driven Parallel Placement for FPGAs pdf |
| Ph.D. | David Grant | Altera Toronto | August 2011 | CAD Algorithms and Performance of Malibu: An FPGA with Time-Multiplexed Coarse-Grained Elements pdf |
| Ph.D. | Usman Ahmed | Altera Toronto | April 2011 | Impact of custom interconnect masks on cost and performance of structured ASICs
pdf
co-supervised with Steve Wilton |
| M.A.Sc. | Chris Chou | PMC-Sierra | April 2010 | VIPERS II: A Soft-core Vector Processor with Single-copy Scratchpad Memory pdf |
| M.A.Sc. | Darius Chiu | Independent | Sept 2009 | Congestion-driven Re-clustering CAD Flow for Low-cost FPGAs pdf |
| M.A.Sc. | Johnny Ho | Ixia USA | Sept 2009 | PERG-Rx: An FPGA-based pattern-matching engine with limited regular expression support for large pattern databases pdf |
| M.A.Sc. | Patrick Dong | Xilinx San Jose | Sept 2009 | Period and Glitch Reduction via Clock Skew Scheduling, Delay Padding and GlitchLess pdf |
| M.A.Sc. | Paul Teehan | Ph.D. student, UBC | October 2008 | Reliable High-throughput FPGA Interconnect using Source-synchronous Surfing and Wave Pipelining pdf |
| Ph.D. | Mehdi Alimadadi | Linear Technology | July 2008 | Recycling Clock Network Energy in High-performance Digital Designs using On-chip DC-DC Converters
pdf 90nm chip layout (4MB bitmap) co-supervised with Patrick Palmer |
| M.A.Sc. | Jason Yu | Intel Canada | May 2008 | Vector Processing as a Soft-CPU Accelerator pdf |
| M.Eng. | Eric Lai | Amazon.com | April 2008 | n/a |
| M.A.Sc. | Mark Yamashita | IBM Canada | November 2007 | A Combined Clustering and Placement Algorithm for FPGAs pdf |
| M.Eng. | Shirley Ma | McKesson Canada | December 2007 | n/a |
| M.Eng. | David Yeager | IBM Canada | December 2006 | Interconnect Estimation for FPGAs pdf |
| M.A.Sc. | David Leong | Nokia Canada | December 2006 | Incremental Placement for FPGAs
pdf |
| M.Eng. | Wilson Lo | unknown | November 2006 | Power Model for Small Custom Embedded Memories
supervised by André Ivanov |
| M.A.Sc. | Edmund Lee | Altera Toronto | Summer 2006 | Interconnect Driver Design for Long Wires in Field-Programmable Gate Arrays
pdf co-supervised with Shahriar Mirabbasi |
| M.A.Sc. | Marvin Tom | Xilinx San Jose | Spring 2006 | Channel Width Reduction Techniques for System-on-Chip Circuits in Field-Programmable Grate Arrays pdf |
| M.A.Sc. | Anthony Yu | Intel Canada | Fall 2005 | Defect Tolerance for Yield Enhancement of FPGA Interconnect Using Fine-grain and Coarse-grain Redundancy pdf |
| M.A.Sc. | Victor Aken'Ova | PMC-Sierra | Spring 2005 | Bridging the Gap between Soft and Hard eFPGA Design
pdf supervised by Resve Saleh |
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You might also enjoy
my old home pages
as a graduate student at the University of Toronto.
Try searching
Library and Archives Canada.
They have Canadian theses and other publications.
If you are looking for information about my book,
try here