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Junaid Asim Khan 1890 W Hillcrest Drive, # 512, Newbury Park, CA, 91320, U.S.A. +1 (805) 480 3528 (Home) junaidasim@yahoo.com |
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Profile |
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Innovative researcher, engineer and academician devoted to work and learning with doctorate in Electrical & Computer Engineering. Industry experienced in ESL tools for System design, verification and testing. Published research work in peer international conferences and journals. Recipient of academic awards. Recipient of National Science and Engineering Council (NSERC) award. Excellent problem analysis and solving skills. |
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Citizenship |
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Canadian Citizen |
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Education |
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Doctorate of Philosophy Electrical and Computer Engineering The University of British Columbia, Canada. |
2005 |
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Research Focus: Data Networks Dissertation topic: Traffic-Engineering Based Routing and Channel Allocation in Wired and Wireless Networks. Courses: CAD Algorithms for Integrated Circuits (95%), Advanced Networking (93%), Data Communication (84%), and Advanced Analog Integrated (audit).
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Master of Science Electrical Engineering King Fahd University of Petroleum and Minerals, Saudi Arabia. |
2001 |
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Research Focus: EDA tools for Design of Digital Systems, and Combinatorial Optimization. Thesis topic: Performance Driven, Low-Power Standard Cell VLSI Cell Placement using Simulated Evolution. Courses: Digital System Testing (A+), Computer Aided Design of Digital Circuits (A+), Digital Signal Processing (A), Digital Computer Design (A), Advanced Electronics Circuits (A), Communication Theory (A), Data Communication (A), Introduction to Modern Control Systems (B+) |
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Bachelor of Engineering Electrical Engineering NED University of Engineering and Technology, Pakistan.
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1997 |
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Experience |
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R&D EDA Engineer |
July 2006-present |
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Agilent Technology Inc, EEsof Division, Westlake Village, California Key Research and Development personal in Agilent’s EEsof Mixed Signal Systems and Verification team. · Responsible for new product investigation, research, and development as it related to interoperable DSP and Digital design ESL tools with RF and communication systems and includes simulation technology development and verification with hardware instruments. · Responsible for Cosimulation technologies in Agilent’s Advanced Design System (ADS) and SystemVue 2008, including HDL (VHDL & Verilog) Cosimulation, SystemC Cosimulation, Cosimulation with GoldenGate, RFDE, and Cosimulation with Cadence AMSD. · Directly responsible for product’s further definition and evolution associated with the overall program and response to new market needs. · Serves as worldwide technical, research, and development reference for the division’s marketing, customer education, customer support, engineering and quality assurance groups as well as provide technical response to worldwide field entities to ensure project’s success and consistency. · Designed, architected and implemented SystemC-ADS Cosimulation and GoldenGate-ADS Ptolemy Cosimulation from scratch. · Worked on a university project on Data Flow Scheduler in coordination with University of Maryland. |
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Post Doctoral Fellow |
Fall 2007 & Fall 2008 |
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University of New Brunswick, Faculty of Computer Science, Fredericton, N.B. · Involved in the research related to Intrusion Detection System and their hardware implementation in Digital System. · Worked on automatic rule tuning for network intrusion detection systems. |
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Graduate Research Assistant |
Feb. 2006-June 2006 |
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The University of British Columbia, Department of Electrical & Computer Engineering, Vancouver, B.C. · Involved in the research in Data Networks, more specifically in routing algorithms. · Developed discrete event simulators in C++ to test proposed solutions. · Developed a base line H.263 encoder for low bit rate video compression. This work was funded by QUALCOMM. · Published several research papers. |
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Teaching Assistant |
Jan. 2002-April 2003 & April 2005 – Dec. 2005 |
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The University of British Columbia, Department of Electrical & Computer Engineering, Vancouver, B.C. Worked as teaching assistant for the course Digital and Microcomputer System Design. · Designed labs for the course using VHDL, Altera Quartus II and Altera Cyclone FPGA devices. · Taught labs and tutorials, prepared assignments and exams questions and graded those. |
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Lecturer-B |
Jan. 2002-April 2005 |
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King Fahd University of Petroleum & Minerals, Department of Computer Engineering, Saudi Arabia. · Taught labs for the course “Fundamentals of Computers”. · Involved in the research in VLSI CAD · Human resource team member in the preparation of Saudi National IT Plan. · Published several research papers. |
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Research Assistant |
Jan. 2001-Dec 2001 |
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King Fahd University of Petroleum & Minerals, Department of Electrical Engineering, Saudi Arabia. · Involved in the research in VLSI CAD · Developed, architected, and implemented a standard cell placement synthesis tool for simultaneous power, area, and timing optimization. · Designed an EDA tool to find set of longest paths in a digital circuit, this information is used in the standard cell placement tool. · Taught labs for the course “Electronics-I” · Published several research papers. |
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Graduate Assistant |
Jan. 1999-Dec. 2000 |
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International Islamic University Malaysia (IIUM), Malaysia · Worked as a C language programmer in an image processing research project to detect scoliosis among school going children. |
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Graduate Trainee |
Oct. 1998-Dec. 1998 |
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International Power (ex National Power), Hub, Pakistan Assisted and instructed undergraduate students in classroom and laboratory settings. · Worked in different departments of a 1292 MW thermal power house.
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Graduate Trainee |
Jan. 1998-July 1998 |
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· National Science and Engineering Council (NSERC) in Canada, PGS-B award, 2003-2005. · Department of Electrical & Computer Engineering top-up award, The University of British Columbia, Vancouver, BC, Canada, 2003-2005. · The University of British Columbia, PhD tuition fee award (September 2003-October 2005). · Two times recipient of student travel grant award, IEEE-INNS (International Neural Network Society), 2001, 2002. · Student travel grant award, American Association of Artificial Intelligence, 2001. · Award for Extraordinary Academic Performance and for Services to the Department, College of Computer Science and Engineering, King Fahd University of Petroleum & Minerals, Dhahran, Saudi Arabia, 2001. · Scholarship under President Talent Farming Scheme, Board of Intermediate and Secondary Education, Hyderabad, Pakistan, 1990-92. |
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HONORS and AWARDS |
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· Industry R&D experience in Synchronous Data Flow simulation technologies for System verification. · Industry R&D experience in Electronic Design Automation tools. · Industry R&D Experience in Cosimulation between different EDA tools e.g. between Cadence IUS and Agilent's ADS · Industry experience in Inter Process Communication Architectures. · Industry experience in SystemC, Agilent's ADS, Agilent's RFDE, Agilent’s SystemVue 2008, Cadence, ModelSim etc. · Industry experience in cross platform software application development, from architecture design to implementation. · Several years experience in algorithmic analysis and design. · Several years experience in C / C++ programming on Solaris, LINUX, and Windows platforms, both 32-bit and 64-bit OS. · Several years experience using HDLs, such as VHDL/verilog to design digital circuits using FPGAs. · Several years experience in designing VLSI (ASIC and FPGA) CAD synthesis tools, especially for physical design. This helps in optimal use of any hardware synthesis tool for ASIC or FPGA design. · Several years experience in hardware design tools such as, Altera Quartus II, Altera MaxPlusII, SPICE, MAGIC, and Xilinx ISE tools. · Hardware architectures for network intrusion detection. · Expert knowledge of IP, TCP, VoIP, OSPF, OSPF-TE, MPLS, ATM, Routing Algorithms, Traffic Engineering, IEEE 802.11 wireless LAN, WiMax, H.263 video compression, Network Intrusion Detection System, SNORT etc. · Experience in MATLAB, OPNET, MAGIC, and MS Office, LaTex etc. · Several years experience in solving combinatorial optimization problems. · Java, Javadoc, HTML, CVS, Doxygen etc. · Excellent written, verbal, and communication skills.
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Skills |
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· Member of International Technical Advisory Committee, the 4th IEEE-GCC Conference and Exhibition, 11-14 November 2007, Kingdom of Bahrain. · Reviewer: The 4th IEEE-GCC Conference and Exhibition, 11-14 November 2007, Kingdom of Bahrain. · Reviewer: The Tenth IEEE Symposium on Computers and Communications (ISCC 2005), June 27-30, 2005, Cartagena, Spain. · Reviewer: WCNC 2005 - IEEE Wireless and Communications and Networking Conference, March 13- 17, 2005, New Orleans, LA, USA. · Reviewer: The Ninth IEEE Symposium on Computers and Communications (ISCC 2005), June 28- July 1, 2004, Alexandria, Egypt. · Reviewer: 2003 IEEE Vehicular Technology Conference, October 4-9, 2003, Orlando, Florida, USA. |
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Reviewer & technical committee member |
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Journal Publications · Sadiq M. Sait, and Junaid A. Khan (August-September 2003), “Simulated evolution for timing & low-power VLSI standard cell placement”, Elsevier Engineering Applications of Artificial Intelligence (EAAI), volume 16, issue 5-6, pp 407-423. · Junaid A. Khan, Sadiq M. Sait (October 2007), “Fast Fuzzy Force-Directed Simulated Evolution Metaheuristic for Multiobjective VLSI Cell Placement”, The Arabian Journal for Science and Engineering, Volume 32, Number 2B, pp 264-281 Conference Proceedings · Junaid A. Khan, and Hussein M. Alnuweiri (2006), “Traffic Engineering in BFWA Mesh Networks at Millimeter Wave Band”, 2006 IEEE International Conference on Communications ICC’06. · Junaid A. Khan, and Hussein M. Alnuweiri (2005), “Traffic engineering with distributed dynamic channel allocation in BFWA mesh networks at millimeter wave band”, The 14th IEEE Workshop on Local and Metropolitan Area Networks (LANMAN). · Junaid A. Khan, and Hussein M. Alnuweiri (2004), “A fuzzy constraint-based routing algorithm for traffic engineering”, IEEE Global Communications Conference (GLOBECOME). 3: p1366-1372. · Junaid A. Khan, and Sadiq M. Sait (2004), “Fast force-directed /simulated evolution hybrid for multiobjective VLSI cell placement”, IEEE International Symposium on Circuits and Systems (ISCAS). 5: pp V53-V56. · Junaid A. Khan, and Hussein Alnuweiri (2003), “A Traffic Engineered Routing Algorithm Based on Fuzzy Logic”, IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PACRIM’03). 1: pp454-457. · Junaid A. Khan, Sadiq M. Sait, and Mahmood R. Minhas. (2002) “Fuzzy Biasless Simulated Evolution for Multiobjective VLSI Placement”, IEEE Congress on Evolutionary Computation (CEC). 2: pp1642-1647. · Sadiq M. Sait, Mahmood R. Minhas, and Junaid A. Khan. (2002) “Performance and Low Power Driven VLSI Standard Cell Placement using Tabu Search”. IEEE Congress on Evolutionary Computation, (CEC). 1: pp372-377. · Junaid A. Khan and Sadiq M. Sait. (2002) “Fuzzy Aggregating Functions for Multiobjective VLSI Placement”, IEEE International Conference on Fuzzy Systems, (FUZZ-IEEE). 2: pp831-836. · M. Ibrahim, J. Khan, A. Almulhem, R. Abaji (2001). “Trade-off Analysis of a New Digit Serial GF Multiplier”, 5th World Multiconference on Systemics, Cybernetics and Informatics (SCI) and the 7th International Conference on Information Systems Analysis and Synthesis (ISAS), Orlando, USA. · Junaid A. Khan, Sadiq M. Sait, A. Almulhem (2001). “Algorithms for Fixed Channel Assignment Problem in Wireless Networks”, 5th World Multiconference on Systemics, Cybernetics and Informatics (SCI) and the 7th International Conference on Information Systems Analysis and Synthesis (ISAS), Orlando, USA. · Sadiq M. Sait, Habib Youssef, Junaid A. Khan, and Aiman Al-Maleh. (2001) “Fuzzified Iterative Algorithms for Performance Driven Low Power VLSI Placement”, International Conference on Computer Design, (ICCD), pp484-487. · Sadiq M. Sait, Habib Youssef, Junaid A. Khan, and Aiman Al-Maleh. (2001) "Fuzzy Simulated Evolution for Power and Performance Optimization of VLSI Placement", INNS-IEEE International Joint Conference on Neural Networks (IJCNN). 1: pp738-743. · Sadiq M. Sait, Habib Youssef, and Junaid A. Khan. (2001) “Fuzzy Evolutionary Algorithm for VLSI Placement”, Genetic and Evolutionary Computer Conference 2001 (GECCO)”. pp1056-1063 · Junaid A. Khan, Sadiq M. Sait and Salman A. Khan. (2001) “A Fast Constructive Algorithm For Fixed Channel Assignment Problem”. IEEE, International Symposium on Circuits and Systems (ISCAS), v5: pp65-68. · Junaid A. Khan, Salman A. Khan, Raslan H. Abaji, (2001) “Prospects of Distance Education in Developing Countries”, Millennium Dawn in Training and Continuing Education (MDTCE), Bahrain. · Syed Z. Shazli, Salman A. Khan and Junaid A. Khan. (2000) “A Fuzzy Genetic Algorithm for Dynamic Routing in Homogeneous ATM Network” First Saudi Technical Conference and Exhibition (STCEX), Riyadh. · Salman A. Khan, Syed Z. Shazli, Junaid A Khan and Sadiq M. Sait (2000), "Distance Education and its prospects in Saudi Arabia" First Saudi Technical Conference and Exhibition (STCEX), Riyadh. |
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Publications |
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· Elected as treasurer, president, and vice-president of UBC student club for three consecutive years. The club includes around 300 student and executive members. · Organized several community events. · Interested in playing Squash and Soccer. |
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