Brad Quinton

Background

I am currently a PhD Candidate in the Department of Electrical and Computer Engineering at the University of British Columbia . I work in the SoC Research Lab and my research advisor is Dr. Steve Wilton . I have also recently worked at Altera's Toronto Technology Centre and I am currently a part-time consultant for Teradici Corporation here in Vancouver.

Prior to beginning my PhD, I worked at PMC-Sierra in both the Saskatoon and Burnaby Design Centres, doing digital design and project management. My undergraduate degree is in Electrical Engineering which I recieved from the Department of Electrical and Computer Engineering at the University of Alberta.

Research

Publications

• B.R. Quinton, M.R. Greenstreet, S.J.E. Wilton, "Practical Asynchronous Interconnect Network Design", to appear in IEEE Trans. on VLSI, 2007.
• B.R. Quinton, S.J.E. Wilton, "Embedded Programmable Logic Core Enhancements for System Bus Interfaces", in the International Conference on Field-Programmable Logic and Applications, Amsterdam, August 2007, pp. 202-209. [abstract] [pdf]
• B.R. Quinton, S.J.E. Wilton, "Programmable Logic Core Based Post-Silicon Debug For SoCs", in the 4th IEEE Silicon Debug and Diagnosis Workshop, Germany, May 2007. [abstract] [pdf] [slides]
• S.J.E. Wilton, C.H. Ho, P.H.W. Leong, W. Luk, B. Quinton, "A Synthesizable Datapath-Oriented Embedded FPGA Fabric", to appear at the ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Monterey, CA, February 2007. [abstract] [pdf]
• B.R. Quinton, S.J.E. Wilton, "Post-Silicon Debug Using Programmable Logic Cores", in the IEEE International Conference on Field-Programmable Technology, Singapore, December 2005. [abstract] [pdf]
• B.R. Quinton, M. Greenstreet, S.J.E. Wilton, "Asynchronous IC Interconnect Network Design and Implementation Using a Standard ASIC Flow", in the IEEE International Conference on Computer Design, October 2005, pp. 267-274. [abstract] [pdf] [slides]
• B.R. Quinton, S.J.E. Wilton, "Concentrator Access Networks for Programmable Logic Cores on SoCs" in the IEEE International Symposium on Circuits and Systems, May 2005, pp. 45-48. [abstract] [pdf]

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