Structural analysis and generation of synthetic digital circuits with memory

TitleStructural analysis and generation of synthetic digital circuits with memory
Publication TypeJournal Article
Year of Publication2001
AuthorsWilton, S. J. E., J. Rose, and Z. Vranesic
JournalVery Large Scale Integration (VLSI) Systems, IEEE Transactions on
Volume9
Pagination223 -226
Date Publishedfeb.
ISSN1063-8210
Keywordsbenchmark circuit, circuit CAD, circuit generator, combinational logic circuit, computer aided design, digital circuits, field programmable gate array, field programmable gate arrays, memory circuit, network analysis, reconfigurable architecture, reconfigurable architectures, sequential logic circuit, stochastic generation, structural analysis, synthetic digital circuit
Abstract

One of the most difficult aspects of experimental reconfigurable architecture or computer-aided design (CAD) tool research is obtaining sufficiently large benchmark circuits. One approach to obtaining such circuits is to generate them stochastically. Current circuit generators construct combinational and sequential logic circuits. Many of today's devices, however, are being used to implement entire systems, and often these systems contain on-chip storage. This paper describes a circuit generator that constructs circuits containing significant amounts of memory. To ensure the circuits are realistic, we have performed a detailed structural analysis of such circuits; this analysis is also described in this paper

URLhttp://dx.doi.org/10.1109/92.920838
DOI10.1109/92.920838

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