The University of British Columbia

Amorphous silicon (a-Si:H) thin-film transistors (TFTs) are widely used in active matrix displays and sensors, in which their operation is typically analog in nature. However, the TFT experiences a VT shift with time under gate bias, and the need for a model of the VT shift with variable gate bias is imperative for robust circuit design. A model for the VT shift under constant and variable gate bias has been presented and agrees with measurement results. The developed model can be easily represented by circuit elements and incorporated into a circuit simulator. As a proof of concept, we use the model to predict the transients of a weighted voltage subtractor circuit.