A low-power 75 dB digitally programmable variable-gain amplifier in 0.18 mu m CMOS

TitleA low-power 75 dB digitally programmable variable-gain amplifier in 0.18 mu m CMOS
Publication TypeJournal Article
Year of Publication2007
AuthorsRahmatian, B., and S. Mirabbasi
JournalCanadian Journal of Electrical and Computer Engineering-Revue Canadienne de genie electrique et informatique
Volume32
Pagination181–186
ISSN0840-8688
Abstract

Variable-gain amplifiers (VGAs) are essential building blocks of many communication systems. In this paper, a monolithic low-power digitally programmable VGA with 75 dB of gain range is presented. The core of the design is based on a low-distortion source-degenerated differential amplifier structure. The gain is varied by changing the source-degeneration resistor and tuning the resistors in the common-mode feedback circuitry. The complete VGA consists of three gain stages. As a proof of concept, a 24 dB single-gain stage with 2 dB gain steps is fabricated in a 0.18 mu m CMOS technology. The prototype chip is tested, and measurement results are obtained. Based on these results, the gain stage is redesigned to optimize its performance, and a three-stage 75 dB VGA is designed and simulated. Each stage has a digitally tunable gain range of 25 dB. The overall gain can be varied from -15 dB to 60 dB in 2.5 dB gain steps. The bandwidth of the multi-stage VGA is higher than 140 MHz, and the gain error is less than 0.3 dB. The overall VGA draws 6.5 mA from a 1.8 V power supply. The noise figure of the system at maximum gain is 12.5 dB, and the third-order intermodulation intercept point (IIP3) at minimum gain is 14.4 dBm.

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