Post-silicon debug using programmable logic cores

TitlePost-silicon debug using programmable logic cores
Publication TypeConference Paper
Year of Publication2005
AuthorsQuinton, B., and S. Wilton
Conference NameField-Programmable Technology, 2005. Proceedings. 2005 IEEE International Conference on
Pagination241 - 247
Date Publisheddec.
Keywordsintegrated circuit, integrated circuits, logic design, logic testing, post-silicon debug, programmable logic cores, programmable logic devices
Abstract

Producing a functionally correct integrated circuit is becoming increasingly difficult. No matter how careful a designer is, there will always be integrated circuits that are fabricated, but do not operate as expected. Providing a means to effectively debug these integrated circuits is vital to help pin-point problems and reduce the number of re-spins required to create a correctly-functioning chip. In this paper, we show that programmable logic cores (PLCs) and flexible networks can provide this debugging capability. We present an architecture and example implementation. We show that the area overhead of this proposed architecture would be well below 10% for many target ICs.

URLhttp://dx.doi.org/10.1109/FPT.2005.1568553
DOI10.1109/FPT.2005.1568553

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