A wideband CMOS LNA design approach

TitleA wideband CMOS LNA design approach
Publication TypeConference Paper
Year of Publication2005
AuthorsMolavi, R., S. Mirabbasi, and M. Hashemi
Conference NameCircuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Pagination5107 - 5110 Vol. 5
Date Publishedmay.
Keywords0.18 micron, 0.9 dB, 1.5 to 2.5 GHz, 1.5 V, 1.6 dB, 1.6 GHz, 15.4 dB, 17.9 dB, 2.7 GHz, 3.2 to 4.8 GHz, 7.5 mA, 8.8 mA, CMOS analogue integrated circuits, CMOS technology, compression point, forward gain, IIP3, in-band noise figure, integrated circuit design, microwave amplifiers, microwave integrated circuits, power-constrained simultaneous noise-input matching design technique, single-ended cascode LNA, UHF amplifiers, UHF integrated circuits, wideband amplifiers, wideband CMOS LNA design
Abstract

A methodology for designing wideband CMOS LNAs is proposed. This is an extension to the existing narrowband power-constrained simultaneous noise-input matching (PCSNIM) LNA design technique. To demonstrate the application of the proposed method, two wideband single-ended cascode LNAs are designed in a 0.18 mu;m CMOS technology to operate in the frequency bands of 1.5-2.5 GHz and 3.2-4.8 GHz, respectively. Based on simulation results, these LNAs achieve: maximum forward gain of 15.4 dB (17.9 dB) with 3 dB bandwidth of 1.6 GHz (2.7 GHz); maximum in-band noise figure of 0.9 dB (1.6 dB); worst case 1dB compression point of -13 dBm (-15 dBm); IIP3 of better than -2.5 dBm (-4.5 dBm) over the entire bandwidth. The LNAs draw 7.5 mA (8.8 mA) from a 1.5 V supply.

URLhttp://dx.doi.org/10.1109/ISCAS.2005.1465783
DOI10.1109/ISCAS.2005.1465783

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