Activity Estimation for Field-Programmable Gate Arrays

TitleActivity Estimation for Field-Programmable Gate Arrays
Publication TypeConference Paper
Year of Publication2006
AuthorsLamoureux, J., and S. J. E. Wilton
Conference NameField Programmable Logic and Applications, 2006. FPL '06. International Conference on
Pagination1 -8
Date Publishedaug.
KeywordsACE-2.0, activity estimation, CAD tools, electronic engineering computing, field programmable gate arrays, field-programmable gate arrays, FPGA, logic CAD, network synthesis, power models
Abstract

This paper examines various activity estimation techniques in order to determine which are most appropriate for use in the context of field-programmable gate arrays (FPGAs). Specifically, the paper compares how different activity estimation techniques affect the accuracy of FPGA power models and the ability of power-aware FPGA CAD tools to minimize power. After comparing various existing techniques, the most suitable existing techniques are combined with two novel enhancements to create a new activity estimation tool called ACE-2.0. Finally, the new publicly available tool is compared to existing tools to validate the improvements. Using activities estimated by ACE-2.0, the power estimates and power savings were both within 1% of the results obtained using simulated activities

URLhttp://dx.doi.org/10.1109/FPL.2006.311199
DOI10.1109/FPL.2006.311199

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