Computation of exact fault coverage for compact testing schemes

TitleComputation of exact fault coverage for compact testing schemes
Publication TypeConference Paper
Year of Publication1991
AuthorsLambidonis, D., V. K. Agarwal, A. Ivanov, and D. Xavier
Conference NameCircuits and Systems, 1991., IEEE International Sympoisum on
Pagination1873 -1876 vol.3
Date Publishedjun.
Keywordsbuilt-in self test, compact testing schemes, computerised signal processing, dynamic programming, exact fault coverage computation, intermediate signatures, logic testing, optimal scheduling
Abstract

A strategy based on the use of intermediate signatures is developed that enables the exact fault coverage of compact testing schemes to be determined in a feasible computation time. A model is developed to predict fault simulation time, and used along with a dynamic programming based algorithm to find the optimal scheduling of the signatures with respect to the total simulation time. A more sophisticated model which uses preliminary fault simulation results to make better estimations is also introduced. Simulation results for both models are presented demonstrating the feasibility of the strategy

URLhttp://dx.doi.org/10.1109/ISCAS.1991.176772
DOI10.1109/ISCAS.1991.176772

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