An analytical model describing the relationships between logic architecture and FPGA density

TitleAn analytical model describing the relationships between logic architecture and FPGA density
Publication TypeConference Paper
Year of Publication2008
AuthorsLam, A., S. J. E. Wilton, P. Leong, and W. Luk
Conference NameField Programmable Logic and Applications, 2008. FPL 2008. International Conference on
Pagination221 -226
Date Publishedsep.
Keywordscluster size, field programmable gate arrays, field-programmable gate arrays, FPGA density, logic architecture, lookup-table size, Rent's rule, table lookup
Abstract

This paper describes an analytical model, based principally on Rentpsilas Rule, that relates logic architectural parameters to the area efficiency of an FPGA. In particular, the model relates the lookup-table size, the cluster size, and the number of inputs per cluster to the amount of logic that can be packed into each lookup-table and cluster, and the number of used inputs per cluster. Comparison to experimental results show that our models are accurate. This accuracy combined with the simple form of the equations make them a powerful tool for FPGA architects to better understand and guide the development of future FPGA architectures.

URLhttp://dx.doi.org/10.1109/FPL.2008.4629935
DOI10.1109/FPL.2008.4629935

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