Testing of combinational majority and minority logic networks

TitleTesting of combinational majority and minority logic networks
Publication TypeConference Paper
Year of Publication2008
AuthorsKarim, F., K. Walus, and A. Ivanov
Conference NameMixed-Signals, Sensors, and Systems Test Workshop, 2008. IMS3TW 2008. IEEE 14th International
Pagination1 -6
Date Publishedjun.
KeywordsAND gates, automatic test pattern generation process, benchmark testing, cellular automata, dynamic probability-based controllability technique, genetic algorithm, genetic algorithms, logic circuits, logic gates, logic testing, majority logic networks, MCNC benchmark circuits, minority logic networks, nanotechnology, OR gates, PODEM algorithm, quantum dots, quantum-dot cellular automata, single electron devices, single electron tunneling, test set size, tunneling phase logic, tunnelling
Abstract

In this paper, we present an extension to the existing PODEM algorithm to include the ability to generate test patterns for majority and minority networks, specifically targeting quantum-dot cellular automata (QCA), but that is directly applicable to other emergent nanotechnologies such as single electron tunneling (SET) and tunneling phase logic (TPL). A dynamic probability-based controllability technique was developed and used as a guide to make more intelligent decisions on which lines to justify during the automatic test pattern generation (ATPG) process. Lastly, a genetic algorithm was used to fill-in the unspecified values in the test patterns produced by the ATPG in order to achieve compaction on the final test set size. The modified PODEM algorithm was tested on a set of MCNC benchmark circuits when using both fixed polarized cells and external inputs to implement the AND and OR gates. Test set sizes were much smaller when implementing the AND/OR gates using fixed polarized cells, however, the computational times for the latter method were generally shorter.

URLhttp://dx.doi.org/10.1109/IMS3TW.2008.4581630
DOI10.1109/IMS3TW.2008.4581630

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