High voltage amorphous silicon TFT for use in large area applications

TitleHigh voltage amorphous silicon TFT for use in large area applications
Publication TypeJournal Article
Year of Publication2004
AuthorsKarim, K. S., P. Servati, and A. Nathan
JournalMicroelectronics Journal
Volume35
Pagination311-315
Date PublishedMAR
Type of ArticleProceedings Paper
ISSN0026-2692
Keywordsamorphous silicon, high voltage, large area, thin film transistor
Abstract

Previous work in high voltage amorphous silicon (a-Si) TFTs (HVTFFs) using an n(+) muC-Si ohmic contact layer demonstrated that the soft contact TFT (SCTFT) design was a requirement for high voltage operation. In this research, conventional and high voltage TFT designs including the SCTFT are presented using an n(+) a-Si contact layer. TFT ON-current measurements and series resistance extractions show that the conventional TFT performs equally well, if not better, at low and high voltages in comparison to all of the HVTFTs fabricated. The results indicate that the conventional space-efficient TFT design with an n+ a-Si contact layer is realizable for high fill-factor, high voltage applications such as direct detection, large area X-ray imaging. Also, the process reliability and performance for both conventional and HVTFT arrays can be improved for large area applications by the inclusion of an additional a-SiN layer. (C) 2003 Elsevier Ltd. All rights reserved.

URLhttp://dx.doi.org/10.1016/S0026-2692(03)00196-4%7D
DOI10.1016/S0026-2692(03)00196-4

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