Guest Editors' Introduction: The Network-on-Chip Paradigm in Practice and Research

TitleGuest Editors' Introduction: The Network-on-Chip Paradigm in Practice and Research
Publication TypeJournal Article
Year of Publication2005
AuthorsIvanov, A., and G. De Micheli
JournalDesign Test of Computers, IEEE
Volume22
Pagination399 - 403
Date Publishedsep.
ISSN0740-7475
Keywordsinfrastructure IP, micronetworks, multiprocessor SoCs, networks on chips, on-chip communication, on-chip interconnection network
Abstract

The network-on-chip paradigm is an emerging paradigm that effectively addresses and presumably can overcome the many on-chip interconnection and communication challenges that already exist in today's chips or will likely occur in future chips. Effective on-chip implementation of network-based interconnect paradigms requires developing and deploying a whole new set of infrastructure IPs and supporting tools and methodologies. This special issue illustrates how, to date, engineers have successfully deployed NoCs to meet certain very-aggressive specifications. At the same time, the articles reveal many issues and challenges that require solutions if the NoC paradigm will indeed become a panacea or quasi-panacea for tomorrow #146;s SoCs.

URLhttp://dx.doi.org/10.1109/MDT.2005.111
DOI10.1109/MDT.2005.111

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