An iterative technique for calculating aliasing probability of linear feedback signature registers

TitleAn iterative technique for calculating aliasing probability of linear feedback signature registers
Publication TypeConference Paper
Year of Publication1988
AuthorsIvanov, A., and V. K. Agarwal
Conference NameFault-Tolerant Computing, 1988. FTCS-18, Digest of Paper s., Eighteenth International Symposium on
Pagination70 -75
Date Publishedjun.
Keywordsaliasing probability, automatic testing, feedback, feedback polynomial, iterative methods, iterative technique, linear feedback signature registers, logic testing
Abstract

An iterative technique for computing the exact probability of aliasing for any linear feedback signature register (i.e. characterized by any feedback polynomial, for any constant probability of error, and for any test length) is proposed. The technique is also applicable to a more general model of the aliasing problem wherein the probability of error may vary with each output bit. The complexity of the technique enables registers of lengths of interest in practice, e.g. 16, to be analyzed readily

URLhttp://dx.doi.org/10.1109/FTCS.1988.5299
DOI10.1109/FTCS.1988.5299

a place of mind, The University of British Columbia

Electrical and Computer Engineering
2332 Main Mall
Vancouver, BC Canada V6T 1Z4
Tel +1.604.822.2872
Fax +1.604.822.5949
Email:

Emergency Procedures | Accessibility | Contact UBC | © Copyright 2020 The University of British Columbia