Essential Fault-Tolerance Metrics for NoC Infrastructures

TitleEssential Fault-Tolerance Metrics for NoC Infrastructures
Publication TypeConference Paper
Year of Publication2007
AuthorsGrecu, C., L. Anghel, P. P. Pande, A. Ivanov, and R. Saleh
Conference NameOn-Line Testing Symposium, 2007. IOLTS 07. 13th IEEE International
Pagination37 -42
Date Publishedjul.
Keywordsfault tolerance, fault-tolerance metrics design, network synthesis, network-on-chip, network-on-chip communication architectures, NoC infrastructures, system performance specifications

Fault-tolerant design of network-on-chip communication architectures requires the addressing of issues pertaining to different elements described at different levels of design abstraction - these may be specific to architecture, interconnection, communication and application issues. Assessing the effectiveness of a particular fault-tolerant implementation can be a challenging task for designers, constrained with tight system performance specifications and other requirements In this paper, we provide a top-down view of fault-tolerance methods for NoC infrastructures, and present a range of metrics used for estimating their quality. We illustrate the use of these metrics by simulating a few simple but realistic fault-tolerant scenarios.


a place of mind, The University of British Columbia

Electrical and Computer Engineering
2332 Main Mall
Vancouver, BC Canada V6T 1Z4
Tel +1.604.822.2872
Fax +1.604.822.5949

Emergency Procedures | Accessibility | Contact UBC | © Copyright 2021 The University of British Columbia