A low-power low-voltage digital bus interface for MCM-based microsystems

TitleA low-power low-voltage digital bus interface for MCM-based microsystems
Publication TypeConference Paper
Year of Publication1997
AuthorsCorreia, J. H., E. Cretu, M. Bartek, and R. F. Wolffenbuttel
Conference NameSolid-State Circuits Conference, 1997. ESSCIRC '97. Proceedings of the 23rd European
Pagination116 - 119
Date Publishedsep.
Abstract

This paper describes a digital local bus interface, which is designed for use in a multi-chip-composed microsystem. The chip area using a CMOS 1.6 #181;m n-well technology is 1mm2. Power consumption at 5V@100kHz is less than 500 #181;W and for 5V@4MHz less than 2mW due to a smart power management of all functional blocks. The bus interface is able to transmit a digital code, bitstream, analog voltage, frequency, duty-cycle and also provides calibration facilities, service request and interrupt request for the smart sensors or microactuators.

URLhttp://dx.doi.org/10.1109/ESSCIR.1997.186120
DOI10.1109/ESSCIR.1997.186120

a place of mind, The University of British Columbia

Electrical and Computer Engineering
2332 Main Mall
Vancouver, BC Canada V6T 1Z4
Tel +1.604.822.2872
Fax +1.604.822.5949
Email:

Emergency Procedures | Accessibility | Contact UBC | © Copyright 2020 The University of British Columbia