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| Title | Design of a (127,99) four error correcting BCH codec |
| Publication Type | Conference Paper |
| Year of Publication | 1988 |
| Authors | Blazek, Z., W. D. Little, and V. K. Bhargava |
| Conference Name | WESCANEX 88: 'Digital Communications Conference Proceedings' |
| Pagination | 94 -100 |
| Date Published | may. |
| Keywords | 5 Mbit/s, application-specific integrated circuits, codecs, error correction codes, four error correcting BCH codec, frequency agility, frequency-hopped spread-spectrum system, jamming, spread spectrum communication, worst-case multitone jamming, worst-case partial band noise jamming |
| Abstract | The design of a codec based on the (127,99) four-error-correcting BCH code is described. This code was chosen as a compromise between overall performance and implementation complexity for a frequency-hopped spread-spectrum system operating under worst-case partial band noise jamming and worst-case multitone jamming. The codec is designed for implementation with application-specific integrated circuits. The approach has a short implementation cycle, requires a very small number of integrated circuit chips, and yields a codec that can operate up to about 5 Mb/s |
| URL | http://dx.doi.org/10.1109/WESCAN.1988.27674 |
| DOI | 10.1109/WESCAN.1988.27674 |