A 660MHz ZVS DC-DC converter using gate-driver charge-recycling in 0.18 #x03BC;m CMOS with an Integrated Output Filter

TitleA 660MHz ZVS DC-DC converter using gate-driver charge-recycling in 0.18 #x03BC;m CMOS with an Integrated Output Filter
Publication TypeConference Paper
Year of Publication2008
AuthorsAlimadadi, M., S. Sheikhaei, G. Lemieux, P. Palmer, S. Mirabbasi, and W. G. Dunford
Conference NamePower Electronics Specialists Conference, 2008. PESC 2008. IEEE
Pagination140 -146
Date Publishedjun.
Keywordscharge recycling, chip level power supply, CMOS, CMOS integrated circuits, DC-DC power convertors, device drive circuit, driver circuits, filters, frequency 660 MHz, fully integrated on-chip LC filter, gate-driver charge-recycling, integrated output filter, low-swing signaling, size 0.18 mum, switching frequency, voltage 0.75 V to 2.2 V, voltage switching techniques, zero voltage switching, ZVS DC-DC converter
Abstract

The design and manufacture of a prototype chip level power supply is described, with both simulated and experimental results. Of particular interest is the inclusion of a fully integrated on-chip LC filter. A high switching frequency of 660 MHz and the design of a device drive circuit reduce losses by supply stacking, low-swing signaling and charge recycling. The paper demonstrates that a chip level converter operating at high frequency can be built and shows how this can be achieved, using zero voltage switching techniques similar to those commonly used in larger converters. Both simulations and experimental data from a fabricated circuit in 0.18mum CMOS are included. The circuit converts 2.2V to 0.75 1.0V at  55 mA.

URLhttp://dx.doi.org/10.1109/PESC.2008.4591914
DOI10.1109/PESC.2008.4591914

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