A 3GHz Switching DC-DC Converter Using Clock-Tree Charge-Recycling in 90nm CMOS with Integrated Output Filter

TitleA 3GHz Switching DC-DC Converter Using Clock-Tree Charge-Recycling in 90nm CMOS with Integrated Output Filter
Publication TypeConference Paper
Year of Publication2007
AuthorsAlimadadi, M., S. Sheikhaei, G. Lemieux, S. Mirabbasi, and P. Palmer
Conference NameSolid-State Circuits Conference, 2007. ISSCC 2007. Digest of Technical Paper s. IEEE International
Pagination532 -620
Date Publishedfeb.
Keywords0.5 to 0.7 V, 1.0 V, 12 pF, 25.7 mW, 3 GHz, 39.9 mW, 40 to 100 mA, 56.2 mW, 90 nm, buck converter, clock circuit, clock-tree charge-recycling, clocks, CMOS, CMOS integrated circuits, DC-DC power convertors, filters, integrated output filter, multicore integrated circuits, pulse width modulation, PWM, recycling clock charge, switching convertors, switching DC-DC converter, trees (electrical)
Abstract

A 90nm buck converter is intended for complex multi-core ICs. Using the 3GHz system clock for switching reduces the area to 0.27mm2 and allows the output filter to be integrated. Efficiency is increased by recycling clock charge and delivering it to the load instead of ground. A dedicated 3GHz clock circuit driving 12pF consumes 39.9mW. In contrast, a combined clock and converter circuit consumes 56.2mW and delivers 25.7mW at the converter output. Regulation is achieved through PWM of the clock. The circuit converts 1.0V to between 0.5 to 0.7V at 40 to 100mA.

URLhttp://dx.doi.org/10.1109/ISSCC.2007.373529
DOI10.1109/ISSCC.2007.373529

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