@article {Beraldin1989Efficient-one-d,
title = {Efficient one-dimensional systolic array realization of the discrete Fourier transform},
journal = {Circuits and Systems, IEEE Transactions on},
volume = {36},
number = {1},
year = {1989},
month = {jan.},
pages = {95 -100},
abstract = {A one-dimensional systolic array realizing the discrete Fourier transform (DFT) of nonstop input sequences is presented. Two arrays having different output schemes, i.e. pipelined and bus-oriented output paths, are introduced. Both arrays require N cells and take N clock cycles to produce a complete N-point DFT. The latency time for the pipeline scheme is twice that of the bus-oriented scheme. For both arrays, a continuous flow of input vectors is allowed and no idle period is required between successive vectors. The array coefficients are static and thus stored-product ROMs (read-only memories) can be used in place of multipliers to limit cost as well as eliminate errors due to coefficient quantization},
keywords = {bus-oriented scheme, cellular arrays, computerised signal processing, DFT, discrete Fourier transform, Fourier transforms, latency time, nonstop input sequences, one-dimensional systolic array, parallel algorithms, parallel architectures, pipeline processing, pipeline scheme, read-only memories, stored-product ROMs},
issn = {0098-4094},
doi = {10.1109/31.16566},
url = {http://dx.doi.org/10.1109/31.16566},
author = {Beraldin, J.A. and Aboulnasr, T. and Steenaart, W.}
}